Screaming Circuits: Via in Pad

Hi Ho, Hi Ho, It's off to Via I go

Here's just another via in pad story. In the first example (the green one), all those open vias are like 15 miles wide - okay, drop the "e", but they're really wide. You can't quite drive a truck through them, but solder will get sucked down into them. Lead-free solder will even go down something that wide. Without some modifications, this is not a very buildable board.

Big vias in padThe second picture (the red one) also has "open" vias, but they are a whole lot smaller. We never like to see open vias, but in the second case, we'll probably just go ahead and use it as-is. It shouldn't be a problem with lead-free solder and may even be okay with leaded. With something like this, we might just run one, check it out and see how it goes and then decide if it's buildable as is based on that.

My guess is that the vias in the red board are about six mills. Maybe even a little smaller. When I hold it up to the light, I can't even see through it. That means that even if the vias weren't intentionally plugged, they effectively are. You will likely get some voiding under the part, but not much in this case.

If your application needs exact predictability in terms of the amount of voiding under the QFP or QFN, then your only choice is to have the vias filled and plated over at theTiny vias in qfp pad board house. If you can get by with some variability (most component manufacturers say that around 50% is okay for most applications, but check with your part manufacturer to be sure), then a good rule of thumb might be that if you can't see light through it, it will likely build okay. If in doubt, get in touch with us and ask to speak with one of our manufacturing engineers about it.

There is not doubt about the green board. Those vias are too, too big to be left open. But, the vias in the red one might just be small and closed off enough to use.

Duane Benson
When does 01631D = 8ABBA9?

Vias under Power Transistors

Normally, a power component like this would have a big pad and some heat dissipation space under the heat slug. It might even have thermal vias going to another heat pad on the back side of the board. If it's being run at anything close to it's full current capability, that would be a requirement. This one is probablyVias under thermal pad a bit underutilized though, rendering the big pad un necessary. It's still a good idea for mechanical strength, but in the prototype world, we don't always follow the rules.

The problem here though, is that the open vias under the part can short to the thermal pad. That's bad mojo. Some board fab houses can put a solid coat of mask over the vias and they'll be okay. Not all board houses will do that though, and if the board has a silver finish (this one is HASL), you wouldn't want the vias sealed because silver vias can outgas and corrode if completely sealed.

We just put something non-conductive between the part and the board and it's all fine, but as I've said so many times before, that's not best-practice, even for a proto, and it's doubly not good in a production environment.

Duane Benson
Connect the 16 via dots and what do you get?

Oopsie in the Center Pad

Darn. This PCB don't look so good. Quick - name two things wrong with it...

Center pad oops 1 

If you guessed that the solder mask is inverted and the vias are open, then you were right. Sorry. No points will be given for this exercise. It's just something that happens now and then and a good reason to double check those Gerbers before you send them out to fab.

So, what happened to this poor pcb? Did it get shipped off to the great recycling heap in the sky? Well, not this time. If it were a production build, it would have been chased out of here faster than a speeding Smart Car. But, as it was, this was a proto build and we got creative.

Center pad oops 2 

A little careful scraping with with a sharp object and viola. We don't recommend this as a solution and we won't guarantee that it will work, but sometimes it will do in a proto world, as it did in this case.

Duane Benson
Scrape goes the weasel

QFN Solder Mask Issues

Here's another QFN oopsie. Presumably, in this case, the flag pad on the QFN is needed as a heat sink and those vias are designed to conduct heat to the other side of the board. That's all good. But, with the solder mask covering everything but the vias, it won't work. I'm guessing this was an accident.

QFN-reverse-mask The stencil looks okay. It's segmented to reduce the amount of paste. We here at Screaming Circuits recommend 50 - 75% paste stencil coverage, as do most QFN component manufacturers. But, again, on this board, it will all go to the wrong place. It will wick down the vias to the other side and may not connect the pad to the part at all.

The best option would be to have the vias filled with a thermally conductive material and plated over. Most fab houses can do this as a matter of course these days. The second option, would be to use slightly smaller via holes and reverse the mask so solder mask is capping the via holes and the rest of the pad is exposed for soldering.

Duane Benson
And keep moles out of your via holes too

Moleish SMT Heatsinks

Little-moleWell, no one ever did give me a reasonable estimation at how deep a mole of moles would cover the  earth. But then, I didn't go back and dig up my old chemistry notes and see if I could find my calculations from nigh on eighty years ago either. Nor did I get out my old Handbook of Chemistry and Physics and try to recreate the calculations from scratch. Maybe I didn't give enough information or parameters for the question - like, just what kind of mole are we talking about here?

Anyway... back to something you might actually care about... D2Pak-w-heatsink-copperI ran across some writing about thermal vias and big parts the other day. Not that the material had anything to do with Avogadro - except maybe that sometimes it looks like a board will have a mole of via holes on the thermal pad in an attempt to get heat away from a power part. If done properly (filled and plated over), that can be a viable option.

For some chips there may be other options too though. A couple of companies make SMT placeable heat sinks for D2Pak and similar chips. I haven't personally used any of these, so I can't speak to the performance, but AAVID and Wakefield are two examples.

The basic idea is that you make the thermal pad a little bit wider, put a small strip of solder mask in between the part and the heatsink spot and you won't need an vias. Look at the heatsink data sheet specs to get the exact dimensions of everything. You'll end up with a part footprint that looks something like this one.

The cross hatch area represents bare copper (or whatever board surface you are using) and the rest would have solder mask. The thin layer of mask between the part and the heatsink will help to ensure that you have better control over the amount of solder under the part and the sink. It should also help prevent solder balls as well.

Duane Benson
How about gophers?

Very Compact Layout?

How do you do it? We've told you not to space things too close. We've told you not to put vias in pads - like a million times. We've told you to watch out for spurious vacuum tubes. Okay, the last one doesn't really count. Vacuum tubes put off a lot of heat and you won't find many with .5mm or less lead spacing so compactness isn't so much of an issue as it can be with mobile devices. Although, I haveTight tubes seen some pretty tightly packed tube designs from the '60s.

Anyway, say you're trying to put a little intelligence into a tiny little package and you just don't have space to route around here and there. Your parts are too close for anything more then maybe a single trace or two between parts.

Here is where the infamous via-in-pad, like Under-dog, can arrive to save the day. We ran across a project a while back with no visible traces on either surface of the board. That technique's actually showing up more and more often with dense-pack designs. All of the traces are on inner layers. It looks pretty weird, but it works very well - if done right.

Before assembly, there also weren't any visible vias. Not a one. All of the components, including Packed in tight passives did have vias - every connection was though a via (via a via???). However, all of the vias were properly filled and plated over at the board house.

So, if you need a 0.52" x 0.42" microcontroller / motor driver like this one, go ahead and give it a shot. Just make sure you fill and plate your vias, and you can use them liberally.

Also make sure you don't interfere with thermal requirements, though. I still have to move the parts out from under the thermal pad of the A3901 motor driver and the little 0201 out from under the thermal area under the MCP1726 regulator here. The PIC doesn't generate enough heat to worry about, so that underside area is fair game.

Duane Benson
Tiptoe through the 0201's with me

0.4mm pitch BGA pads

At 0.5mm pitch and larger, we generally recommend non-solder mask defined (NSMD) pads for BGAs. The NSMD pad will allow for better adhesion with the solder being able to grip the sides of the copper in addition to the top surface. Even down to 0.5mm pitch BGAs, most part manufacturers still say to go with NSMD pads. Granted, you need to make sure your fab house can do a good job of mask registration. It's no good to have pads that are half SMD and half NSMD. We've seen that.

Once you go down to 0.4mm pitch BGAs, though, things get different. We're starting to see more and more of these. Some CSP (chip scale package) or WSP (wafer scale package) BGA and LGA parts are starting to show up in 0.4mm pitch, as well as some bigger parts like the Ti OMAP processor.

At that size, you start to see more risk of solder bridging with NSMD pads, as in the left side of the illustration below.
0.4mm pitch SMD BGA pads 
This is a somewhat exaggerated view, but it shows the potential problem here. With such small geometries, you probably aren't going to be able to route escape traces on the top layer either. You'll have to put blind vias in the pads and escape through the inner layers. By the way - NO OPEN VIAS IN PADS. The pad needs to be solid metal with such a part. No exceptions. Don't try using solder mask to cap the vias at this pitch either. Plate over it. It has to be all metal.

You can finds some more detail here in a design guide written by Ti for their OMAP processor. Pages 8 through 12 talk about pads, mask and vias. Obviously, you should consult similar materials written specifically for the part you are using, but Ti did a great job of covering all the issues here so I use it as a good general piece.

Duane Benson
Are you there Moles? It's Edgar.

Speaking of Common QFN Issues...

Classic via in qfn pad Here is the classic QFN via in pad. It simply isn't possible to solder the center pad properly with that much open via real estate.

The best way to deal with this is to fill the holes with something that will still do a good job of conducting heat away and then plate over the holes.

Barring that, you could put solder mask caps over the holes on the component side shown here. Most manufacturers recommend that the soldermask cap diameter be 100 - 125 um wider than the via to minimize voiding and thermal insulation.

Some people will put soldermask caps on the back side of the board. That may work, but it still tends to be problematic. Solder can still wick down in the vias leading to excess voiding. The via caps can pop open resulting in an open via that sucks solder off of the pad.

Duane Benson
Look closely and you might see Paul Lynde in the center via

0201 and The Blind Via

0201 size passives can help drop down a PCB form factor, but to really get the most compression, you need to get rid of all of the traces.

One way would be to put little transceivers on each lead of the part. In fact, if you did that, you wouldn't even need a PCB. You could just dump all of the parts in a little bag. But, you'd then have to come put with a whole new protocol, a way of transmitting power, yada, yada, yada. Okay. In my dreams.

But, you can get rid of the traces - or at least hide them with blind and buried vias. (Note - don't even think about using open vias. Don't - even - think - about - it!!!) Get a real good board house and have all of your traces inside of the PCB connected to the pads with blind vias. You can scrunch that board down real good, or just use all the extra space for a handy, dandy ground plane.

Something to consider though: It's tough enough to build a board like this and rework is really, really icky. Make sure you leave enough space for assembly and be very careful to avoid problems that would cause rework.

Duane Benson
Now on the planet Shrinky Dinky...

Via in Pad - Right and Wrong

Here's a pretty simple via-in-pad example that has both good and bad. It's an SOIC-8 so it's a pretty big part. It's not super roomy, but there is plenty of space on the PCB to do things a little different.

Via_in_pad_right_and_wrong Note pin 1. It does have a via connected to the lead land pad, but it also has a little strip of soldermask - a dam between the contact area of the land pad and the via. That little mask dam will stop solder from flowing into the via and everybody will be happy. Well, some people just have a sour disposition so they'll probably never be happy, but at least the assembled PCB will be happy.

Pins 5 through 8, though, are a different story. They have an unobstructed metal path from the land area to the via. It's quite likely that the capillary action of the via will suck the solder off of the lands leading to an unreliable connection. Since one side is all okay and the other is all not okay, you might see a tug-o-war of sorts with the surface tension of the good side pulling the chip too far that way.

My advice to you: Move the vias a hair further away from the pad and put a little soldermask dam in there, just like was done on pin 1.

Duane Benson
Soldermask is as soldermask does.