Screaming Circuits: Via in Pad


Super Small Via In Pad

Via in pad is an old issue that still pops up now and then. Our standard answer hasn't changed: No open vias in pads. But one of the questions we get related to the subject is: "What if we make the vias really small?"

Beagleboard U6 viasLogically, that makes sense. In fact, in some cases, the via is so small that it's essentially closed. If it's so small that it really is closed, then it's not an open via. But look close - if it's closed with solder, that solder may melt during reflow leading to an open via.

The images here show some pretty small vias. I believe they're 0.3 mm in diameter.

Beagleboard vias back sideIn the first picture, on the left, it appears that the vias are open. They aren't though. This board (an unstuffed Beagleboard) uses soldermask on the back side of the PCB to close off the vias, as shown in the image on the right.

Our recommended method (se more detail here and here) is to plug the via with copper or epoxy and have it plated over at the board fab house. Next, we'd recommend via caps on the component side. FInally, capping the back side with soldermask, like this example can work, but it comes with the risk of voids. The via caps and also pop open, leading to an open via.

Duane Benson
No more open vias-in-pad, I mean it!
Anybody want a peanit?

Via in Big Pads

The answer to the question: "is it ever okay to put open vias in BGA pads?" is simply No. It's no, no, no, no, not ever!!! That makes it easy. No technique to worry about. No tolerances. Nothing. Just don't put an exposed via in a BGA pad. The only option is between the pads, with a complete soldermask dam between the pad and via, or have the vias filled and plated over at the board house. Nothing but metal is allowed on the BGA pad.

Now, other components give you more flexibility and thus require some choices and guidelines. Andy B. asked about large components, such as voltage regulators where the manufacturer has recommended vias to connect the thermal pad to the ground plane, or to additional thermal area on the back side of the PCB.

The easy answer is to just treat it like a QFN and read our various suggestions surrounding that form factor. Here's some. Having the extra room does allow for additional flexibility, but if the vias are open, they still run the risk of sucking solder to the other side of your PCB. You can sometimes get away with really tiny vias, as in here. But it's not best-practice.

It's really a matter of trade-offs. I have seem opinions stating that you should never fill or cap the via because doing so might impede the thermal transfer. Well, power chip manufacturers, you shouldn't rely on unbuildable design to meet product specs. You can fill the vias with thermally conductive material. You can cap the via with solder mask, as in the link I just gave you. Just make the via cap as small as possible - 100 to 125 microns larger than the via.

DFN8 w stop and paste w vias-trFinally, segment your paste stencil layer. If you put solder paste on top of an open via or even on top of a masked via, you can be asking for trouble. In this image, the six vias (which will be capped) are put between the openings of the stencil.

Duane Benson
Tesla says what?

Via in Pad x 8

Via in 8 pin padsHere's an interesting via in pad case. On the one hand, the footprint is very symmetrical and clean looking. On the other hand, it has open vias in the pads.

At first glance, I thought this was a DIP footprint with extra long pads, but it's not. It's for an SMT part. Personally, I would have put mask between the pads. Looking at the rest of the board (not shown), the spacing between pads and mask is pretty wide, so there may be a good reason. I'm not sure though.

Definitely, though, I would not put the vias in the pads like that. Those open vias will cause solder to flow down to the other side of the board, make a mess there and leave the chips without sufficient solder.

Duane Benson
Sucking solder through a straw - or via

How not to treat your BGA friends

Over the years, most of what we see are good PC boards. But some standout in the other direction as examples of what not to do. Some didn't make it through the board house alive. Some were unknowingly rendered useless in layout and some were just held on to too long or not stored properly.

Large BGA via in padIn this first image, we see a guaranteed not to work example. Open vias in BGA pads will ruin your whole day. And you can't just cap them with solder mask either. For BGAs, the only two via solutions are to have them filled and plated over at the board house, or not be in the pads at all. Having a via in a BGA pad is like trying to cook scrambled eggs over a camp fire without a skillet. The eggs will in fact cook, but they'll be all mixed in with the fire and coals and stuff and you won't be able to eat them.

BGAB mask issuesThis next guaranteed not to work example shows a valiant attempt at keeping the vias out of the pads. But, as we used to say on the playground: "close only counts in horseshoes and hand grenades - and sometimes atom bombs." Here on the right, first, the mask registration is way off. That's not good but doesn't necessarily spell BGA death on its own. What will kill this assembly is the clear metal path between some of the pads and the vias. You need to have some soldermask blocking the metal path between the pad and the via. If you don't, it's almost as bad as putting the via in the pad. This board has a few places where there is a thin solder mask dam between the via and the pad. But, in the cases where there is no mask, the solder and solder ball will most likely migrate over to and down through the via.

Duane Benson
Close might also count with badgers.

BGA pads with Vias

Via eyeballs

No. This isn't a closeup of an owl face.

There is still some debate on how best to create a land pattern for a 0.4mm pitch BGA. We recommend soldermask defined pads at that pitch. But that's not really what this post is about. Although this land pattern uses non-soldermask defined pads which can encourage bridges. If you need to cross a river, encouraging bridges is good. If you're trying to make a board work, they are not.

In the case of the two BGA pads shown, I really doubt you would have to worry about bridging. That's because the solder ball would most likely be sucked off the BGA due to the capillary action of the via in the middle of the pad. You most likely wouldn't get bridging. You most likely wouldn't get any contact of any kind at all. This will not work.

Duane Benson
Hoot. Hoot.

Small Open Vias

Tiny vias in qfp pad Parts change and so do vias. Our standard policy here is that open vias in pads are bad. We from time to  time recommend ways to plug them. Generally, you have several options. Like this post shows. However, with vias in the pads of really small parts, those solder mask options will probably not work. Solder mask generally isn't put down with enough precision to cover holes on tiny pads, and further, the solder mask would probably mess with the clearance. On the left is an example of a small QFP with open vias in the pads. Those are some small vias.

So, if solder mask isn't going to work, what QFN center void open vias will? Filling and plating over them. That's what will work. You really only have two choices: fill and plate, or live with a bunch of voids under the part and solder slopped on the bottom side of the PCB. Here on the right are two illustrations representing the issue.

In the top half of the image on the right, I'm representing the vias with copper plugs and plated over at the board fab house. As with all parts of this sort, there may still be tiny voids. IPC and the manufacturer will have guidelines on the maximum allowable voiding. On the bottom, you see what happens with the vias left open. You get two problems: big voids and solder on the underside of the PCB.

Certainly there are some applications where this doesn't matter. That's why there is a second choice: "live with a bunch of voids and slopped solder." If you can't live with voids and solder slop, you have to bite the bullet and pay the extra for a PCB with filled vias. Board houses that do this have a variety of materials to use including copper, electrically conductive epoxy and thermal conductive epoxy.

Duane Benson
Please sir, may I have some more voids?
No! No voids for you!

 

Via Shifting

Here's an example of what via in pad can do for a small passive component. Other things can happen too, like tomstoning or twisting. But take a close look at this photo. In doing so, you'll note that both sides of  Small fillet passive via in pad the part are soldered down. Sure, it's shifted, but who really cares? It's electrically connected. Right?

In this case, much of the solder on the lower pad flowed into the via. This led to an imbalance in surface tension between the two pads which shifted the part. Some logic might say that since both ends of the part are soldered in and there aren't any shorts, it's all cool.

It is all cool because it's been out of the reflow oven for quite a while, but it's not cool because it's not good workmanship. The IPC created standard IPC-A-610 for just such an issue. Class I is the loosest. This might pass that. I'm not sure though because we don't do anything with Class I here at Screaming Circuits except reject it. Class II is the typical commercial type standard and this shall not pass that standard. Nor would this pass Class III, an even tighter workmanship standard for higher-reliability requirements.

That's the real issue: reliability. With a good, symmetrical solder joint, you not only have a good electrical connection, but you also have a reliable mechanical connection. It will resist flexing and thermal expansion stress. This one may not. Give it some good thermal cycles or bounce it around in a race car engine computer and you may find yourself sidelined.

The moral of the story is to keep those vias out of your pads; even with passive components. Or, put the vias there but fill and copper plate them at the board house.

Duane Benson
Balrogs in pad are bad too

Via Current Capacity

Over on the Circuits Assembly blog, Michael asked a question about my Via in Pad Myth #5. He asked:

"I have a question about vias. I have seen charts on the current carrying capacity of traces, but what about vias?"

That's a good question. I've heard that you first need to know the thickness of the via wall. Then, once you know that, you can calculate the trace-width equivalent for the via by using the formula for the circumference (diameter X pi ). For whatever number that gives you, compare the closest smaller trace width.

Via cross section My related questions to all of you PCB fabrication gurus out there are:

Since vias are not created in the same way as the trace plating is, can that simple formula be used? While the trace copper is laminated onto a nice smooth PCB surface, the vias are typically created by deposition of copper dust in the via and then electroplating more copper. Then the surface finish is applied to all of the exposed metal. The via walls would generally be rougher than the flat substrate surface. Does that have an impact on the current capacity of a via?

Further, since airflow will be somewhat restricted in a via relative to a surface, should the via effective width be compared to an internal trace instead of an exposed surface trace? Should it be a compromise between the two?

If you look closely at this via cross I pulled from Wikipedia, you can see that the via wall looks to be thinner that the traces. You'll have to make sure that your board fab house can give you an accurate thickness of the via wall.

Duane Benson
If you know the via current capacity, can you calculate the past and future capacity?

Via-In-Pad Myth #5.A

I received a couple of good questions on my prior post about vias in QFN or QFP pads:

"I have a few questions about the second photo. The thermal vias in the center are masked over, doesn't this make it difficult to get uniform solder reflow on this pad? Also, what about the height differences due to the solder mask? Finally, what would the paste mask look like for this part?"

The part I used for the illustration is a QFP, but the same would go for QFNs also. All of the issues in question are somewhat more critical with QFN parts.

First, having the thermal vias masked over does make solder uniformity more difficult. The best option is to have the vias filled and plated over at the PCB fab house. That can be more expensive than is practical Padinvia_alt w stencil in many case though, so mask is still frequently used. A smaller mask size, 100 - 125 microns bigger than the via, is preferred to the larger mask are here, but this technique is used when registration is a concern. Again, it can be a cost issue. With a properly segmented mask, as illustrated on the right, reasonable solder deposition can be achieved.

Height isn't much of an issue with QFP parts, but can be with QFNs. Again, when the mask is properly segmented, height issues will be effectively mitigated.

Duane Benson
Stanley Yelnats doesn't like vias.

Random Via-In-Pad Myth #5

Myth #5: When you need thermal vias, more is better, bigger is better

Hmmm. Logically, this would seem to be the case. There are limits though; especially if you want a reliably assembled product. Older parts with heat slugs easily accessible for bolting on heat sinks didn't have this issue. Just bolt on a piece of metal and maybe blow a fan across it. It's different with a lot of the new, Padinvia smaller surface mount packages. Many have a heat slug on the bottom which requires carefully placed thermal vias to a copper pad on the underside of the board.

An extreme case of flooding the land with vias can be seen in this illustration here on Padinvia_alt the left. In terms of assembly, you can hack this together for a prototype, but it'll never fly in a production environment.It would be much better to use fewer smaller vias and have the center land covered with solder mask except where the metal on the chip is exposed, as in the illustration on the right.

Duane Benson
Place one carrot seed in each via and cover it with planting soil