Today, I'll start with the basics: Soldermask via caps. This isn't the best, but it is the easiest. Almost any board house can pull this one off with a reasonable chance of success. In this example, what we're looking at may be the center pad for a QFN, the metal tab on a D2Pak or a similar smt component with a wide copper area the requires via for thermal relief or grounding.
In example A, the via is capped on top with soldermask. Most manufacturers recommend that the soldermask cap diameter be 100 - 125 um wider than the via to minimize voiding and thermal insulation. Interference with heat transfer is minimal in this example.
In example B, the via is capped with a wide soldermask circle. This is a decent method for non-critical applications with larger QFNs. It is easier to do at the board house and should be adequate in most cases other than extremes of signal or thermal sensitivity. It will insulate a bit so you won't get the maximum heat sinking. With this technique, the solder paste stencil must be segmented so that solder paste Will not be deposited on the soldermasked areas.
Example C shows what you should not do - leave the via completely open. Capillary action will likely cause most of your solder to end up on the bottom of your board and not securing your chip. With very small diameter vias, lead-free paste and careful stencil design you may be able to successfully use this design. If you absolutely need to do this, call and talk to our engineers first.
Example D is the least preferable (after C) method. Capping the bottom side will usually keep the solder from dripping out onto the bottom of the PCB, but several other problems can occur. Outgassing from the solder paste can cause the cap to pop off, leaving you with an open via. Solder, especially leaded, can still drain down into the via. You can end up with too much voiding under a QFN or the ball can be sucked off of a BGA. This can work, but, as with C, call us first and talk to an engineer.
Stay tuned. More to come.