Screaming Circuits: Parts Form-factors

A Bit More On the LGA

After my last post about LGA land patterns, I received a couple of questions asking for more detail in a few areas.

"The LinearTech  LGA apnote (LTM46xx series) shows planes on the mounting layer interconnecting pads that are solder mask defined. This is supposed to be for heat dissipation. Will smaller copper defined pads and vias to full internal copper ground and power planes provide adequate cooling?

What about using LGAs on the same layer as BGAs? BGAs have copper defined pads? We've been sending 1:1 soldermask gerbers to the fab house so they can adjust per their process. Can this be done selectively so the SMD LGA pads don't grow bigger? What kind of Fab Note should be in the "Readme" file?

Also, please warn LGA users to be careful using wizards (eg Pads Layout) to generate the pad numbering. Linear Tech's LGA does NOT follow the standard BGA alpha numeric numbering. I don't know about other LGA mfgrs numbering systems but ... Double check the pad numbering and avoid this nasty snake bite!"

First, as far as cooling goes, the answer, unfortunately is "it depends on how closely to the limits you are driving to part." You will get best results with more surface copper. That being said, you can use vias to internal and back-side planes to increase heat dissipation. Ideally, you would have Lot's of surface copper and vias to the internal and back side planes, but that's not always possible. The vias that are not under the LGA pads can be left open. Any vias in an area to be soldered must not be left open. Ideally, you would have them filled with a thermally conductive material and plated over. You do have some flexibility to reduce the surface copper and replace it with vias to other planes, but ultimately, the final answer will only come from your design testing.

You can have NSMD and SMD pads on the same PCB. How to do it is the big question here. Many fab shops will make their own decision on what is "best" for your PCB in this regard. I would speak with the board house and get their recommendations on how best to specify what you need in terms of NSMD and SMD mixed. You'll probably have to follow a slightly different procedure for each different fab shop.

I would double echo the comment about using caution when using wizards to create a land pattern. Not all manufacturers follow the same numbering scheme. You could get bitten badly with this one.

Duane Benson
Who was that soldermask defined man?

Et Tu Embedded Passives

I don't know if or when embedded passives will become the "next big thing" in PCB design, but they are on the way. We, at Screaming Circuits, have been asked about the use of embedded passives a few times.

Embedded passives
The purported advantages of the technology lie primarily in the ares of cost reduction and space reduction. You could potentially get your bypass caps much closer to where they need to be as well. The space parameter is pretty obviously an advantage, but the jury is still out on costs. I suspect that at this moment, it's pretty difficult to find a board house that can fabricate a PCB with embedded passives.

If you're not familiar with the concept, capacitors or resistors are built up on the inner copper layers of the substrate. There are a couple different methods used such as plating, printing or thin-film. As shown in the illustration, the resistors and capacitors inside the PCB negate the need to mount them on the outside. I can see rework being a problem if any of those embedded parts has issues.

In terms of assembly, we wouldn't treat such a board any different than any other PCB. If your fab house notes that there are temperature or any other restrictions, let your assembly house know. Beyond that, all the standard rules apply.

Duane Benson
Note from Forbin: Colossus is watching

Land Patterns - Equal and Not Equal

I was recently asked a question about QFN package varieties. The questioner wanted to know if different package variants of 16 contact QFN packages, such as HUQFN, DHVQFN, SQFN and such, all shared the same footprint.

If they did, the CAD work would be much easier. There would be one land pattern to worry about and that would be that. Unfortunately, that is not that and in this case, that, in fact, that may never be that.

Many different varieties of QFN packages could use the same land pattern, but they don't always do. Some will have the same pitch, but more distance between the outside contacts and the corner, thus a greater overall dimension. That can happen even with the same labeled variety of QFN package. Some will have different dimensions, differnt pitch, different pad sizes or different thermal pad sizes. Sorry. No easy answer here.

I popped on over to the NXP website, one of our Circuit Design ECOsystem partners, for some examples. NXP lists two 60 contact HUQFN part packages. One is 5mm x 5mm. The other is 6mm x 4mm. Same with the HVQFN. There is a .65mm pitch 4mm x 4mm package and two.5mm pitch 3mm x 3mm parts with a different overall package outline.

In general, generalzations aren't going to work here. You're going to have to go dig out that datasheet and quite possibly create a new land pattern.

Duane Benson
One pattern to rule them all and in the solder bind them

Window Pane in not a Pain

QFN parts (also known as MLF or Micro Lead Frame) parts used to cause a lot of problems a few years ago, as evidenced by the number of blog posts covering the subject.

Can I use my own blog as cited evidence to justify my own conclusion? Doing so is probably bad form, but I'm doing it anyway. Interestingly, if you look up "citations" in Wikipedia, the entry (as of this writing) has a note indicating that the article on citations has insufficient in-line citations. Hmmm.

Screaming_QFN_Fig1 Anyway, it seems that the industry in catching up with the proper manufacturing methodology for use of the technology. It's important enough though that it bears repeating now and then. The key to successful QFN and DFN manufacturing really is in the solder paste stencil pattern. Consult the data sheet for the part, but if you can't find the datasheet or if it doesn't cover the stencil layer, use the window pane technique, or "segmenting" for the stencil layer when you're making the library part for your CAD software.

If you leGood QFN stencil bave the full thermal pad area fully open, you'll most likely end up with too much solder in that area. The part will ride higher than it should and may very well float too high for all of the pads on the  side to connect. See the top  part on the above right illustration.

Shoot for 50 - 75% paste coverage by segmenting the stencil as in this illustration on the left here. That'll ensure that the center pad and the side signal lands will be at the same level. You'll get much better yields and reliability.

Duane Benson
The strangest sight I've ever seen
2 buffalos, 2 buffalos, buffalos on my lawn.

Easy Reading for a Long Weekend

The holiday is upon us and most folks here in the US will have a three day weekend. Of course, when you're an engineer on deadline, all too often holidays don't really mean that much. Here's a little food for thought for those that will be working over the weekend.

  • If you're trying to finish off that layout and need some advice on a pesky QFN or DFN, read these few bits about laying out for a quality reflow: here, here and here.
  • If you're trying to decide what finish to order on your PCB, read this, this and this.
  • If you just want to confuse yourself a bit, try this, this and this.

Now you can get back to some real problems - like finding that last little bit of clock jitter or figuring out how to keep the back-EMF from mucking with your MOSFETs.

Duane Benson
No shorts allowed under that BGA, 'cause shorts cause tan lines

0.4mm Pitch BGAs - Staggered?

I wrote not long ago and not far, far away about the type of pad recommended for 0.4mm pitch BGAs, as in non-soldermask defined vs. soldermask defined (NSMD vs SMD). The wisdom being that with the pads being so close on a 0.4mm pitch land, the BGA balls may be too close together and may bridge if the pads are NSMD.

I got a comment from an engineer stating that not all 0.4mm pitch BGAs are Staggerd .4mm NSMD pads created equal, that some have staggered lands which would still require NSMD pads. I searched and couldn't find a picture of such a part or corresponding land - too many millions to go through - so I simulated what that might look like in this image.

IPC calls this an "Interspersed array" (IPC-7095B, March 2008, Figure 6-13) or a "Staggered Matrix" (IPC-7351A, February 2007, Figure 14-8)

The thought being that, when staggered like this, the center to center distance between the pads is 0.57mm even though the column center to center distance is 0.4mm and that would put it back in the realm of getting better results with NSMD pads because 0.5's and above generally want NSMD pads.

Hmmm. Makes sense. Thanks Mr. Pythagoras for the extra 0.1656854mm of space.

Duane Benson
Use the reflow, Luke. Use the reflow

Extra Fine Pitch BGA pads

One of the annoyances of the world of trade secrets and proprietariness is that we can't all learn from each others' experiences. That is important and even generally necessary in a competitive world. If you put in some hard work, you should get the first right to profit from it. Otherwise what incentive would you have to put in that hard work?

There are times, however, when it would be helpful for the industry or the economy in general if we can all learn from someone else's challenges. Times when, for example, the entire auto industry and therefor the safety of the general public would benefit if all companies shared what they have learned about the reliability of electronic throttle systems.

Bb Good SMD pads Here's another chance for open source hardware to shine. Take the Beagleboard. The Ti folks who designed it pushed technology in a number of areas and by presenting what they have created as open source, we can all benefit from it. Even stepping outside of the great work in the schematic, they have done great service in the areas of manufacturing complex devices as well.

A while back, I wrote about soldermask defined (SMD pads) vs non-soldermask defined (NSMD) pads on .4mm pitch BGAs. The basic idea is that while with most Bb Bad NSMD pads BGAs, you want NSMD pads for better mechanical strength, with the really small BGAs, like the .4mm pitch OMAP processor, you want SMD pads to prevent shorts.

The messages that the Beagleboard team learned here are, first, it's true that you want SMD pads and second, make sure that your PCB fab house follows your instructions in that regard.

Many fab houses have their own rules and will set the soldermask up based on what they feel is best. They may have never used your part though. Make sure the board house does what you need. By insisting on closing up the soldermask, the Beagleboard team went from 90% failure with the NSMD pads to 96% good and no BGA shorts with the SMD pads. (This info and the photos come from the Beagleboard ESC presentation by Gerald Coley).

Duane Benson
The worms do.

Why Those Castle Walls?

When I pick a subject, I seem to get moderately obsessed with that one topic and I'll end up covering it over and over again. I don't mean to. It just tends to happen that way. Castellated mounting systems seems to be the obsession of the day right now as evidenced by this, this and this very post.

Over on the Circuits Assembly blog, where my posts also show up, Rick posted a question about the form factor:

"I do not completely understand the purposeā€¦ would you expound on the functionality?"

It is an odd duck of a form factor and at first glance, it doesn't make a lot of sense. But upon digging into it a bit, I can see where it comes from. Generally, this form factor is used for modules, such as GPS units, RF devices and POL (point of load) power supplies.

  1. First, each of those things are not really chip-able as complete units. They are self-contained functional blocks and really need to be on a PCB.
  2. In the past, most modules of the sort had thru-hole pins for mounting, but SMT allows for less expensive manufacturing when used on a design that is all SMT
  3. The castellations, or half-vias, allow for a fillet on the outside of the module to improve the mechanical reliability of the connection.

It's really not that difficult of a form factor to use. But since it's fairly new, you're unlikely to fined the CAD library footprints to be pre-made. Make sure you read the datasheet carefully when creating the footprint. Make sure you leave pad both under and outside the part.

Duane Benson

Using Package on Package (POP)

Back in August of 2009, we at Screaming Circuits assembled our first package on package chip set. We did a number of test components first to tune the process and then built up some Beagleboards. We've done a few more since then. It's not yet a high-demand item, but it is getting more popular.

Amkor POP sm At the ESC (Embedded Systems Conference) last week, we had a number of folks stop by our booth and ask about how to use the part. The OMAP processor from Ti that comes in a POP form factor is a great high-performance part, but I think a lot of designers are still intimidated by it. Really, though, there's nothing special about designing with POP.

It's a 0.4mm pitch BGA and that gives some challenges with escape routing and PCB masking, but those are standard BGA-type issues. For escape routing, go to, download the beagleboard reference manual. They have their version of the escape routing in the book. And, check out this post for some advice on the BGA footprint.

That's pretty much all there is to it. The memory chip just plops on top of it, so as a designer, you don't have to worry about that. Just do a good 0.4mm pitch BGA layout and your POP will come out just fine.

Duane Benson
Does Kellogg make Raspberry flavored Package on Package Tarts?

Castellated / Half-Vias, parts 2 - 255

I've written about the Castellated / half-via mounting system a couple of times in the past. Now I can't seem to avoid them. I'm seeing them everywhere. The GPS I recently wrote about, low noise amplifiers, POL power modules, frequency synthesizers, VCOs...

When did this become the package of the day? I haven't even seen what IPC has to say about it yet but these things are all over the place. Our engineers and assembly folks are cool with it. It's not that tough to build, fortunately. But, as I saw with the ublox part I wrote about, there are new design issues to contend with.

I can certainly see the advantages of the package. The half via can allow for a good solid fillet providing good mechanical connection. They're typically a pcb-type substrate so the coefficient of expansion and flex strengths should be similar to the underlying pcb. On the other hand, like with an LGA the low profile after soldering will tend to exacerbate any expansion or flex risks.

Duane Benson
Once in a dream
Far beyond these castellated walls...