Screaming Circuits: CAD Parts Libraries


Day two. Custom parts

Moving on from where I left off a few days ago... I was planning on using the PIC18F2320, but in poking around, I found that the PIC18F2321 is about $3.00 less expensive in small quantities. I'm not entirely sure why. Their virtually identical. The 2320 does have two 8-bit timers instead of one in the 2321, but I haven't spotted any other differences that would matter to me in this case. The 2321 has lower sleep and idle currents but I don't think that matters in this application either.

PCB123 PIC partial sch PCB123 doesn't have the 2321 in its library. I could just use the 2320 part, but to get full use out of the pricing and availability features, I'll have to customize the part so that the BOM tool can find it at DigiKey.

I had the "place component" box up already, so I just clicked on "manage Parts" and started filling in the information in the middle column of the dialog. The I clicked the "Select Simple" button, searched on "2320" and selected the symbol for the PIC18F2320-I/SO. So far, so good.

PCB123 manage parts dialog Now, the question is: do I select "Apply Changes" or "Create a New Part"? This would be easier if I actually looked at the documentation or something, but am I doing that? Of course not. I'm going with "Create a New Part." Oops. Needed to select or generate the footprint first. Do that and search on "SOIC" and pick out an SOIC28, "Create New Part" and save it in a Library. I picked "Microchip."

Done. Now when I go back to the Insert / Add Part function, I search on PIC18F2321, and there it is. Apparently, I did it right, because the BOM tab will find it and show price and availability at DigiKey.

Duane Benson
And, today, it's not just a rain cloud, but a full one

 

Centroid / XYRLS / Pick and Place

Call it what you may, but surface mount assembly robots need this magic file to determine where to place your components and how to orient them. We call it a Centroid. Others may call it something else, but it's all basically the same. In our case, the basic format is comma delimited, in mils:

Ref designator,     Layer,     LocationX,     LocationY,     Rotation
    C1 ,                       Top ,           0.5750  ,       2.1000  ,           90

That's not too difficult. Most CAD programs will automatically create this file for you. Eagle doesn't natively, but we have a ULP to do it for you in Eagle (Downloaded here). Again, no problems here. Mostly...

I say mostly because, at this point, you are at the mercy of the person who created the CAD library part. Provided they center the origin and follow the IPC for orientation, everything should come out just fine. Unfortunately, we do find parts that don't follow those rules. We'll do our best to catch and correct such things here, but for maiximum reliability, check you library components to make sure. We find the problem crops up most commonly with passives.

IPC says that zero orientation for two pin passives is horizontal, with pin one on the left. For polarized capacitors, pin one is (+). For diodes, pin one is the cathode. They note that pin one is always the polarity mark pin or cathode. Pin one is also on the left for resistors, inductors and non-polarized capacitors, but left vs right doesn't matter so much with non-polarized things. The most common orientation error we se is to have the "zero rotaion" 270 degrees off from the IPC standard.

Every now and then we'll find that someone assumes that since usually the anode on a diode tends to be on the positive side, that the anode should be pin one. Nope. Nope. Nope.

Duane Benson
Is it pulling electrons or pushing holes?

Virtual Questions

Here's a question I received during my Virtual-PCB chat session back on March 8th.:

From Jack: "Here's my default question (as a designer), what is your biggest headache from designers?"

My answer: "Probably the most common difficulty has to do with CAD library footprints. That's really a headache caused by the CAD software"

Jack: "ha, well it seems like the majority of problems stem from incorrect library fottprints (including mask, silk, etc.) maybe we just need to get together and make a universal library for everyone, eh?"

I've been hearing a lot of lamentations over the last year regarding CAD library footprints. It seems to be one of those issues that has been around long enough and is now reaching a criticle mass of attention. There are a few partial solutions in the works. PCB123 is trying to make the most complete set of libraries possible. NXP has been supplying factory libraries to PCB123. There is the IPC-7351B land pattern generator. Some manufacturers give good footprint guidance at least (Ti, Freescale). Sparkfun and Adafruit are supplying libraries for most of the components that they use and sell.

All good things and all in the right direction, but still not a consolidated univeral effort. There's also talk flaoting around of croudsourcing libraries. I can see that working for Eagle and a few other packages, but I question whether large companies using expensive CAD systems would rely on such a thing. I guess that all means that we don't have a solution in sight, but if the problem is getting broad-based visibility, than maybe someone will come up with an actual complete answer.

Duane Benson
Esperanto for CAD libraries

Who's Right?

Jack commented on my prior post, An Unanswered Question. His point was that instead of just saying "check with the manufacturer's datasheet", like I so often suggest when talking about land patterns, I should give more credit to the IPC and understand that many datasheets are the result of less than thorough study. That's a very good point.

The challenge is that some manufacturers do a great job of figuring out how to use their packages, such as Ti with their Package on Package (POP) OMAP, or Freescale with some of their ZiBee chips. u-blox has done a good job of documenting paste mask requirement for their castelated mounting configuration too. On the other hand, some other manufactures seem to have just cut and past part of an old data sheet without even giving it a once-over. As Jack mentioned, with some of the newer packages, IPC doesn't always have the data yet. I didn't see that IPC-7351B covers 0.4mm pitch BGAs yet. It does do a good job of covering the need to segment the solder pastes stencil over a QFN center pad, which I also have written about here more than a few times.

I guess my thinking is that the part manufacturer should be the best equipped to tell us how to use their components. To Jack's point though, that would be in an ideal world. But, reality rarely holds up to the ideal. Some manufacturers do quite well and some seem to virtually forget that they even made the part once it's out of the development labs. IPC does a very good job but isn't necessarily the most current. Then, of course, some manufacturers don't follow the IPC guidelines. Board fab houses and stencil makers have a lot of good data too, but also aren't always up to date (nor are assembly houses).

I suspect that I get a little cynical on this subject in general because we see so many diversions from standard come through our shop. The designers, by and large, would much prefer to lay out their boards for greatest manufacturing success, but so many of them have a very difficult time finding the necessary data.

In some ways, I think the environment is getting better. More people seem to be aware of the need for good standards and to follow those standards. IPC seems to be pretty quick in adding in newer packages. The IPC land pattern generator is a big help. But the proliferation of new parts in new form-factors negates a lot of that gain.

Duane Benson
I'm not convinced that in net, this post has any actual content.

An Unanswered Question

I've been reading through my Virtual-PCB chat session transcript from yesterday. It was a fun session and I have a much better idea of how the virtual shows work now. I think I may just be getting it.

The chat session had a lot of interesting questions and dialog. I did notice, however, that I missed one question and thus didn't answer it. Oops.

Owen asked if I am of the opinion that all footprints should have rounded pads (probably stencil cutouts too) to help with paste release. Sorry I missed your question.

I'm not of that opinion. There are a lot of factors that come out of stencil decisions. Paste release is one of them. There are others, some more important. For example, the shape of a pad and stencil cut out can either encourage or discourage solder balls. The size of the opening can put too much or too little paste on the pad. Wide open cut-outs over heat slugs can cause float.Bad QFN paste w caption

The pads themselves, should follow the part manufacturers recommendation for shape and size. Most  are rectangular. BGAs have round pads. Unless you have a very good and very specific reason, I would not deviate far from the part manufacturer's recommended footprint.

Some of the factors that influence paste release are the stencil thickness, whether it's polished or not, the angle of the cut, ratio  of thickness to width and paste properties. How long the paste has been exposed to air as well as the room's temperature and humidity can also have an impact. Lot's of permutations.

If you're reading this Owen, Sorry I missed your question in the chat. I hope this answers it for you.

Duane Benson
If it's going to the EU, make sure it's peanut butter free.

Cute Wiring

Yesterday, I wrote about my foibles in ignoring my own advice. As SiliconFarmer pointed outRework 002 cropped over on Twitter, it's not just something you need to do when you're re-purposing a close land pattern. Sometimes even the "correct" pattern can have the wrong drill size or a few mixed up pins.

The bottom line is that if you want to reduce the chance of scrapping some expensive PCBs, or having spots that look like what I did (on the right here), check your land patterns.

I couldn't find my wire-wrap wire late last night, so instead, I used the leads from old thru-hole resistors. It's kind of a mess, but I do like the hatch-markish look that I gave it.

Not to shift any blame off of myself, but I do find it quite annoying when a part falls into such a common standard configuration, as in three-terminal regulator, but the manufacturer picks a different pin-out.

[Note that this is rework I did myself at home. The folks here at Screaming Circuits do  much, much higher quality work.]

Duane Benson
The problem with unwritten rules is that they're unwritten

Lesson Learned... Or Not

MC39100 pin out I've written quite a number of times about the perils of CAD software land patterns. Especially if you don't have an exact match and need to adapt something close.

Recently, I was looking in my Eagle library for a low-drop out regulator, MC39100 is SOT223. It's just a standard, run of the mill 7805 replacement. Nothing special. A million other parts share the same pin-out. Shouldn't be a problem. Shouldn't...

If I were to follow my own advice, it wouldn't have been a problem. But did I follow my own advice? Well, not this part of it. I took for granted that all three terminal regulators follow the 78XX pin-out. Most do, but the LD1117A (below, left) does not. This isn't the first time I've used a non-standard regulator, so I really don't have an excuLD1117A pin outse.

Naturally, I assumed that the pin-out matched what I needed and I didn't hunt down an LD1117A data sheet to verify their pin-out. Well, at least I didn't do so until trying to get my new PCB to power up. Very sad.

So, is there a moral to this story? Probably. Most likely it would be two-fold. One, if you're re-purposing a land pattern from a part that's close, but not exact, double check your work. Get both data sheets out and compare the pin-out.

The second part of the moral is, if you give adice... follow it yourself. Duh.

Duane Benson
Help! I'm blinded by the obvious.

A Bit More On the LGA

After my last post about LGA land patterns, I received a couple of questions asking for more detail in a few areas.

"The LinearTech  LGA apnote (LTM46xx series) shows planes on the mounting layer interconnecting pads that are solder mask defined. This is supposed to be for heat dissipation. Will smaller copper defined pads and vias to full internal copper ground and power planes provide adequate cooling?

What about using LGAs on the same layer as BGAs? BGAs have copper defined pads? We've been sending 1:1 soldermask gerbers to the fab house so they can adjust per their process. Can this be done selectively so the SMD LGA pads don't grow bigger? What kind of Fab Note should be in the "Readme" file?

Also, please warn LGA users to be careful using wizards (eg Pads Layout) to generate the pad numbering. Linear Tech's LGA does NOT follow the standard BGA alpha numeric numbering. I don't know about other LGA mfgrs numbering systems but ... Double check the pad numbering and avoid this nasty snake bite!"

First, as far as cooling goes, the answer, unfortunately is "it depends on how closely to the limits you are driving to part." You will get best results with more surface copper. That being said, you can use vias to internal and back-side planes to increase heat dissipation. Ideally, you would have Lot's of surface copper and vias to the internal and back side planes, but that's not always possible. The vias that are not under the LGA pads can be left open. Any vias in an area to be soldered must not be left open. Ideally, you would have them filled with a thermally conductive material and plated over. You do have some flexibility to reduce the surface copper and replace it with vias to other planes, but ultimately, the final answer will only come from your design testing.

You can have NSMD and SMD pads on the same PCB. How to do it is the big question here. Many fab shops will make their own decision on what is "best" for your PCB in this regard. I would speak with the board house and get their recommendations on how best to specify what you need in terms of NSMD and SMD mixed. You'll probably have to follow a slightly different procedure for each different fab shop.

I would double echo the comment about using caution when using wizards to create a land pattern. Not all manufacturers follow the same numbering scheme. You could get bitten badly with this one.

Duane Benson
Who was that soldermask defined man?

What about the LGA?

I've written a bit about soldermask defined (SMD) vs. non soldermask defined (NSMD) pads for BGAs.

Quick summary: 0.5mm pitch or wider spacing, go with NSMD pads. 0.4mm pitch seem to need SMD pads to prevent bridging (unless the pads are staggered. Then NSMD is fine)

But what about the LGA (Land Grid Array)? It's different due to not having the solder balls. Does that make LGA a difference? According to Freescale and a few other manufacturers, in most cases, you should treat an LGA just like a BGA and use NSMD pads. However, if you need extra strength holding the pad on to the PCB, you may want to consider using SMD pads. As always, consult the data sheet for your specific part for the final word.

Duane Benson
Checkers anyone?

0.4mm Pitch BGA Redux

I've written about it before, and again here.

When dealing with new technology parts, it's really important to look up all of the manufacturer's component information that is available. I'm going to quote from the Texas Instruments document "PCB Design Guidelines for 0.4mm Package-On-Package (PoP) Packages", Section 10 (PDF page 8)

"Industry reliability studies have revealed that NSMD-type pads are highly recommended for most 0.5mm pitch BGA applications. However, there is a problem with this approach at 0.4mm pitch.

Real-world assembly experiments with the BeagleBoard and the OMAP35x EVM revealed a tendency for solder bridging between pads when NSMD were used. There was insufficient solder mask webbing between the pads to ward off bridging. Therefore, a SMD design was used which resulted in much better assembly yields with no solder bridging."

If you are using a 0.4mm pitch BGA with the balls aligned in a grid (as opposed to staggerd), read the design guidlines from the manufacture before laying out the board.

In a presentation about the development of the Beagleboard, Gerald Coley, Beagleboard designer, notes that their first two runs had non soldermask defined pads resulting in a 10% yield. After another run of PCBs where the pads on the PCB were the same size as the pads on the device and the PCB pads were soldermask defined, their yields went to 96%. And verify that your PCB house does in fact follow your instructions. Some will think they know better and will change the mask layout.

If you are still unsure or think your design will have different requirements, call an applications engineer at the component manufacturer and discuss your project and the layout.

Duane Benson
Trust but verify