Screaming Circuits: CAD Parts Libraries

How not to treat your BGA friends

Over the years, most of what we see are good PC boards. But some standout in the other direction as examples of what not to do. Some didn't make it through the board house alive. Some were unknowingly rendered useless in layout and some were just held on to too long or not stored properly.

Large BGA via in padIn this first image, we see a guaranteed not to work example. Open vias in BGA pads will ruin your whole day. And you can't just cap them with solder mask either. For BGAs, the only two via solutions are to have them filled and plated over at the board house, or not be in the pads at all. Having a via in a BGA pad is like trying to cook scrambled eggs over a camp fire without a skillet. The eggs will in fact cook, but they'll be all mixed in with the fire and coals and stuff and you won't be able to eat them.

BGAB mask issuesThis next guaranteed not to work example shows a valiant attempt at keeping the vias out of the pads. But, as we used to say on the playground: "close only counts in horseshoes and hand grenades - and sometimes atom bombs." Here on the right, first, the mask registration is way off. That's not good but doesn't necessarily spell BGA death on its own. What will kill this assembly is the clear metal path between some of the pads and the vias. You need to have some soldermask blocking the metal path between the pad and the via. If you don't, it's almost as bad as putting the via in the pad. This board has a few places where there is a thin solder mask dam between the via and the pad. But, in the cases where there is no mask, the solder and solder ball will most likely migrate over to and down through the via.

Duane Benson
Close might also count with badgers.


P3281577 smIt's pretty important to have unambiguous polarity markings and pin one markings printed on your PCB. In theory, for SMT parts, it really shouldn't matter; the centroid would take care of the placement orientation. But, you may have noticed that it's not a perfect world. It took me a while to figure that out, but I have finally concluded such.

It's not uncommon for the CAD library part to have the wrong zero degree rotation orientation The IPC specified location for pin one orientation Quad and BGA for square chips like QFPs, QFNs and BGAs is either the upper left or middle top. Check out our Centroid guide for more detail. If it's wrong in CAD, the centroid will be wrong as will everything downstream. That's why markings on the board are still important.

What do you do if your part is ambiguous though? This particular chip has three markings that could be interpreted as pin one indicators. At first glance, I'd assume it's the dot in the center top. It would match with the text. However, there is a white dot in the lower left that could be pin one indicator which would mean, in this case, the CAD library component had the incorrect zero rotation orientation.

Datasheets aren't always easy to find. This one is behind a registration wall. If you have a part like this, it's really helpful if you include some documentation (in electronic form) clarifying. I found the datasheet for this particular part and was able to confirm that it is correct as placed with pin one down in the lower left (90 degrees).

Duane Benson
Via via in the board,
what's the top on my PCB?

Connectors Kill

Lot's of types of components can cause footprint woes. QFNs have their center pad issues. BGAs have escape via issues. But the most common footprint issues seem to be with connectors. At least with chips Connector footprint 2smand discrete silicon and passive components most manufacturers pretty much follow IPC standard footprints. Sometimes they'll create new ones for smaller parts, but generally they still stay reasonably close to in line.

Connector footprint 1smConnectors are another story though. I'm not sure any manufacturer follows anything close to a standard. This pair of ethernet jacks is a good example. Often the actual pin layout will match, but the mounting will vary widely. I've seen it on ethernet, mini-USB, micro-USB and even the old, old RS232 connector.

It gets more frustrating when they're almost the same. We see that a lot; the layout will almost, but not quite match a footprint in the library. The bottom line is never take a connector footprint for granted. Always double check before getting your boards fabbed.

Duane Benson
Carburetors man. That's what life is all about.

More CAD footprint woes

AT this point, I really shouldn't call them "woes." More like business as usual. I'm talking about the need to make custom footprints, or at leas modify footprints. Back in the old days, the only thing needed to make footprints was some copper pds, maybe plated through, maybe not. It was pretty rare to even need to make a custom footprint. Other than the occasional odd switch or relay, it was all done.

I really need to just get over it though. On the one hand, it seems like none-productive time; like I should be able to get right to schematicing and layouting. On the other hand, It's so common, I just need to see it as no different than any other routing task.

Starting at the top of my BOM, I have:

  • An MCU in QFN format - I modified a symbol and added a custom paste layer to the copper land
  • Two SOIC Mosfet drivers - I modified the symbol on an existing footprint
  • Some Mosfets in a PowerQFN package - Made a complete custom footprint
  • A Mosfet in SOT-23 package - Who hoo! I found a workable part in the library
  • Some Power Schottky diodes - custom copper land

Custom footprints

I have another Schottky, some TVS diodes, LEDs and a bunch of passives that came straight out of the library. It's certainly not everything that needs footprint work, but with so many variations of the more complex parts these days, it safe to assume that any SMT project will require a fair amount of library work. It's just the way it is.

Duane Benson
It's a pain but at least it's not as bad as 11811 has it

Shrouded vs. non-shrouded

Notch down bp purpleA connector isn't a connector isn't a connector. In this photo, the original PC board was designed to have an unshrouded break-away header, as shown in the inset on the right. I measured it. The entire header fits within the silkscreen outline.

However, as you can see, a shrouded header was used in that spot. While as designed, there was plenty of clearance between the header and the two capacitors and resister, the shroud for the substituted header covers all of the resistor and half of the capacitors.

You can prototype it this way, but it will never fly in production.

Duane Benson
Find the ghosts of Dawnstar

"Shrinky Dink"

I had some "Shrinky Dinks" when I was a kid. Amazingly you can still buy them. You can also use that concept in your prototyping. I did that recently. I have a robot board design that I'd like to shrink about in half and add in a LiPoly charger chip. Most of the design came from something I had built previously, but the charger chip was new to me as was the compression needed to meet my size goals. Sadly, you can't just put your PCB in the oven and have it shrink like a Shrinky Dink. Maybe if you could put stretchy copper traces on it so they wouldn't peel of while the substrate shrinks...

The charger comes in both DFN-10 and MSOP-10 packages and the MCU comes in SOIC and QFN packages. The QFN is the 44 pin version while the SOIC is the 28 pin version of the chip. Same core. Just more I/O.

LBDC Li LBDCmini pRather than test my ability to shrink and the use of the LiPoly charger at the same time, I added it into the original design without changing the size. There's much more room for probing or even for adding test points if I needed them. Once that design checked out okay (which it did), I just went into the schematic editor, changed the SOIC to the QFN package, the MSOP to the DFN and most of the passives to 0402 packages. I really didn't have to make any changes to the schematic.

That almost worked perfectly. The 28 pin MCU doesn't come in a variant with a QFN package, so I couldn't just change the package type in the schematic editor. I had to delete the SOIC version, place and wire in the 44 pin QFN variant. I made a few other changes too. I added in a QFN packaged RS232 driver and a hard power switch. In the original, I had envisioned a soft power switch but I changed my mind. I also had to modify the library parts to make sure that the solder paste layer on the QFN and DFN parts fit our guidelines. Lastly, I removed some LEDs that I only had on the board for debugging purposes.

The most important two considerations were watching out for physical part interference and getting the paste layer correct on the QFN/DFN parts.

Duane Benson
It's the size of a small walnut


LiP DFN unstuffedIn the land of protorypes, sometimes "close enough" is good enough. That can save money on PC boards and assembly when a particular package version of your part is out of stock. But, it's not universal. Sometimes you can't go that way.

I've got an MCP78338 Li Poly charger chip. It comes in 10-DFN and 10-MSOP packages. I originally used the MSOP version on my first PCB pass. Everthing worked just fine, so I re-layed out the board to be about half the area. That meant that wherever possible, passives went from 0603 to 0402 and chips went from whatever to QFN/DFN pacakges.

LiP MSOP on DFN padUnfortunately, the DFN package Li Poly charger seems to be out of stock with long lead times. That got me looking at my options. Option 1, would of course be to just wait. Option 2 would be to re-lay out the board for the MSOP part in that space. Option three is to use the "we'll make it fit" mantra. There are no gurantees at this point, but sometimes it's worth a try.

But... Twas not to be. If you look at the second image, you can see that the footprint of the MSOP part leads is wider than the land pads for the DFN. I suppose there are still a few really messy and potentially expensive options You could solder a small wire on to the pads, sticking out from the pads, effectively making them big enough to accomodate the chip. Very ugly, but might work. Probably too spendy though.

Duane Benson
Carpe DFN

QFN Solder Paste Layer

LBDCminiI've got the fab order placed with for my next demo project. The little board is represented here at pretty close to actual size on screen - provided you have a 22" monitor set at 1680 pixel horizontal resolution. Give that, you might want to click on it to pop up a bigger representation of it. That makes it about 4 X life size.

When you do that, take note of the QFN / DFN parts: The processor in the middle, the LiPoly battery charger right between the upper two mounting holes and the RS232 driver in the lower left. I've followed my paste layer advice and segmented the paste stencil layer to reduce the chance for float or major voids.

I found a footprint in the library for the big processor in the middle. I just had to modify the paste layer, as shown here. I made the footprint for the charger and RS232 chips from scratch. Neither had anything close enough in the library.

The DFN has a slightly different approach to segmenting the stencil layer. Little squares like I used on the other two chips work just as well, but this is effective as well.

Another thing to take note of is the markation on the LEDs. The original footprint for the 0402 LEDs does have a polarity mark, but it's one of the types that can easily be misinterpreted or can be difficult to see. The diode symbol put down in silk screen removes any possibility of ambiguity.

Duane Benson
I'm happy I live in a split level head.


QFN Stencil Gerber

In the previous epside, Wally’s attack on Dilbert’s kingdom prompts Ratbert to perfect an “N”-Ray, to be discharged from a powerful Nullitrion, to neutralize and render useless Wally’s power plant. Dilbert tells Dogbert the Nullitrion can best be directed against Wally’s palace from the Devil’s Dome, in the Land of QFN segmented stencilThe Dead. Wally learns of their plans, and his soldiers plant a powerful time bomb on the Devil’s Dome, but are promptly captured by Pointy Haired Men. Dogbert and his party land, unaware of the bomb and the Pointy Haired Men who are watching and….

As we re-join our intrepid heros, you can see, circled in red, what the custom QFN stencil layer, from the previous episode, will look like in the Gerber file. Obviously the stencil cut outs will look like this too. Except they won't be green. These format cut-outs will deposit the recommended 50 - 75% paste coverage in the center pad of the QFN leading to a good solid solder joint.

Stay tuned for next week's episode where Dogbert assists Dilbert in assaulting the manufacturing warehouse of Devil's Dome to recover the missing 0402 bypass capacitors.

Duane Benson
Azura, Queen of Mars, ordered the Russian Phobos-Grunt probe to be disabled by a ray-beam

QFN Custom Stencil Layer in Eagle

It's been said over and over that you don't want to leave the solder paste opening wide open for a QFN center pad. 50 - 75% paste coverage will get you bets results. With full coverage, your QFN can end up floating too high and not connecting with all of the pads due to their significantly smaller aperture.

But hCustom paste layer 1ow do you create a custom paste layer? In Eagle, it's not terribly obvious, but it is easy. Open the part that you want to customize in the Eagle Library editor. Open up the package for that component. Now, select "i" on the left side and click on the center pad. You might need to turn off the "tcream" layer in order to select the pad. Custom paste layer 2

In the Properties dialog box, un check the check box for cream. That will get rid of the standard stencil layer. Now you can use the rectangle tool to add in stencil cut-outs as you want the. Make sure you set the layer for the rectangle to be "tcream" and remember that you are drawing the cut-outs of the stencil, not the blocked part.

Obviously it will be different for every CAD package, but the concept is the same. As is the need to do so.

Duane Benson
The Internet is weird.
There's actually a website for paste eaters.