Component Packages - Let's Get Small

I've been on a bit of a package binge lately. First talking about metric vs. US passive sizes, and then a very tiny ARM Cortex M0 from Freescale.

The Freescale BGA part checks in at 1.6mm x 2mm. That's cool and I'm almost always in favor of making things as small as possible, but, as I wrote in my prior blog on the subject, it's not always possible. The 0.4mm pitch BGA is problematic unless you can spend a lot of money on the raw PC boards, or will have super high volume.

Small boardAll is not lost, though. You still can use a tiny ARM Cortex M0 part. Just not quite as tiny. That same part also comes in a 3mm x 3mm QFN package. You lose four pins (16 vs. 20) going from the BGA to the QGN, but if you can handle that, it's a very viable option that doesn't require any exotic PC board technologies.

A few years ago, QFN's were scary, but not so much any more. I've designed a few of them in using Eagle CAD. Just be sure to pay attention to the footprint. A 6 mil trace is more than small enough for a 0.5mm pitch QFN.

Duane Benson
Strive at all times to bend, fold, spindle and mutilate

0.4mm Pitch BGA is Awesome

I recently had a conversation with a friend about 0.4mm pitch BGAs. The specific part is the Freescale FreescaleKL03KL03 ARM Coretex-M0+ microcontroller in a 1.6mm x 2mm, 04.mm pitch package. That's a 20 ball wafer scale BGA form factor.

I don't have an actual part to photograph next to a grain of sand, but trust me (or don't), it's really small.

Ti 0.44 pitch dimensionsThe challenge, and the reason I suggested a QFN form factor instead, is the costs
involved. If you have the extra budget money for more expensive PC boards, then go ahead and use this form factor. You probably won't be able to use this package in cost constrained situations.

The simple reason is that you can't escape route the inner six pins without using super small vias between pads, or in pads and filled and plated over. The page on the left is from a Ti doc, but any variations in geometry will be minor.

You can see that you can't put a trace between the pads. Maybe a 2 mil trace, but maybe not. There just isn't much room. The recommended method is to put micro vias in the pads and have them filled and plated over at the board fab house. Never put a via in a micro BGA pad unless it's filled, plated over, and flat.

Duane Benson
There are more things in heaven and earth, Horatio, 
Than are dreamt of in your philosophy.
But open vias in pads aren't one of them

When is an 0201 Not an 0201?

Metric vs US resistor packageI'm working on a special project here that involves some 0402 LEDs and 0201 resistors. When doing such a thing, you should always check the footprint you're using against the data sheet. When using extra small parts, like this, I recommend making a custom footprint unless the one you picked is exact, and I mean exact. There just isn't an margin for error at these geometries.

Take a look at the table on the right. The dimensions are in mm. Spot anything a bit off? Counter to most data sheets, the sizes listed in the "Type" column are metric sizes. At DigiKey, the package was listed as "0201 (0603 Metric)." I see that all the time, but for some reason, most data sheets Metric vs US resistor package Conversionshow the package name in US size while listing the dimensions in metric.

The first table was at the front of this data sheet (page 5). The second table was on page 35 - the opposite end of the data sheet.

We do occasionally get boards with metric size pads for a US size part, or vice verse. Sometimes we can make it fit, but not always. Bottom line, is to check and double check. I caught this one because the dimension .54 mm is about 21 mils, which is too small for an 0402. That, and the fact that the table doesn't list an 0201 size.

Duane Benson
Is it Bigfoot or Sasquatch?

 

VLV - Very Large Vias

I recently received a question over on Twitter. Tomaž Šolc, AKA avian2 asked:

"@pcbassembly What is your opinion on the "one big plated drill in QFN ground pad" pattern? pic.twitter.com/M9ZLftpuo0"

From Avian2 Ban_N62IEAAm3acI answered back: "Bad for machine assembly, okay for hand assembly." That's definitely true, but it's worthy of a bit more explanation. Here's the photo avian2 included along with the question. We're looking at the side opposite of where the QFNs are mounted. The two big openings in the square gold pads are the big vias (plated drill).

This is often done when hand soldering QFNs. Somehow you get the little pins on the outside edge of the QFN soldered down. Then you turn the board over and poke your soldering iron into the big opening to solder the pad down.

Generally, there wouldn't be any reason to do this with machine assembly, as we do here in our plant. You put a number of small vias, cap them, and segment the solder paste layer (refer to this post and this post). Thus, we would never recommend using big vias like this for machine assembly.

However, I can envision some situations that might call for this. First, there's the hand solder method I mentioned above. Next, there may be some very specific need to expose a lot of the pad to open air for cooling. In general, this is not the best way to get cooling, but maybe in some special case. Third, perhaps you need access to the pad as a test point and don't have enough room to get access any other way.

You wouldn't do any of those three things in a production environment, but in a prototype world, sometimes things happen differently.

Duane Benson
Hurray! Only one day until Mitten Tree Day!

Pads on Ground Plane

Pour-no thermalGenerally, small pads for passive parts are connected  with a single PCB trace of equal size to each pad. That's the right way to do it.

However, sometimes, circumstances dictate a little different approach. The illustration on the upper right here shows something of a worst-case. This is for a snubber (resistor, capacitor pair) between two power planes.

A couple of things will likely happen. The power plane will act as a heat sink, preventing the solder paste on one side from melting, resulting in a poor connection. Or, the unequal melting could lead to surface tension pulling the part up, causing tombstoning.

Pour-with thermalMost designers are aware of that, but sometimes, thermals will be deliberately turned off to allow for better current capacity to and from the large power Mosfets (not shown). If that's the case, make sure that you can turn the thermals (see image on loer right) on or off by the part, rather than just by the plane.

Duane Benson
The rain falls mostly on the ground plane due to static attraction

Super Small Via In Pad

Via in pad is an old issue that still pops up now and then. Our standard answer hasn't changed: No open vias in pads. But one of the questions we get related to the subject is: "What if we make the vias really small?"

Beagleboard U6 viasLogically, that makes sense. In fact, in some cases, the via is so small that it's essentially closed. If it's so small that it really is closed, then it's not an open via. But look close - if it's closed with solder, that solder may melt during reflow leading to an open via.

The images here show some pretty small vias. I believe they're 0.3 mm in diameter.

Beagleboard vias back sideIn the first picture, on the left, it appears that the vias are open. They aren't though. This board (an unstuffed Beagleboard) uses soldermask on the back side of the PCB to close off the vias, as shown in the image on the right.

Our recommended method (se more detail here and here) is to plug the via with copper or epoxy and have it plated over at the board fab house. Next, we'd recommend via caps on the component side. FInally, capping the back side with soldermask, like this example can work, but it comes with the risk of voids. The via caps and also pop open, leading to an open via.

Duane Benson
No more open vias-in-pad, I mean it!
Anybody want a peanit?

CAD Data Files

I've spent a fair amount of time researching and writing about the centroid file and about CAD library footprints. One of the challenges in this industry is that somethings that are "standard" really aren't all that standard. That's why we emphasize following IPC guidelines when creating library components.

Well, a few things have changed since we started doing this a decade ago. For one, some of the enhanced manufacturing file formats (as opposed to the 1970's vintage Gerber format) have become more prevelent. Those new formats are a very good thing.

Most CAD packages can now output either ASCII formatted CAD data or ODB++ format data. Those file formats have all of the data that would otherwise be found in the centroid and Gerber files. They also have more accurate data. If you can get one of those formats out, go ahead and send it to us. We can also take plain old Eagle CAD .brd files. If in doubt send one of these newer files along with the centroid and Gerbers. We'll use the file with the best data and, we may be able to simplify the file preparation Centroid snippet rot optyou have to do with future jobs.

And speaking of the Centroid, don't worry so much about the rotation column in the Centroid file. You can consider rotation to be optional now. You don't need to check the rotation, nor do you need to remove it.

Duane Benson
Who will win? Godzilla or Centroid? Maybe the Smog Monster?

 

Push-me Pull-you LEDs

I may never get tired of talking about LED and diode polarities. It's so much fun. Not long ago, I wrote about two LEDs from the same manufacturer, marked with opposite polarities. I recently ran into another one, but at least this one tells you on the same datasheet. This image is an actual unmodified clip from the datasheet.

LED confusing polarityI can't for the life of me understand why this would be done on purpose. I could maybe understand is one was designed in a different building, but it couldn't have been too hard for someone to say: "Hey - wait a minute..." before sending these things off to manufacturing.

Of course, maybe they built a million before noticing and then just decided it would be easier to change the datasheet. Regardless, it's kind of nuts in my opinion.

The other thing here is that, while you can generally get away with the indicators "+/-" on an LED, you can't with all diodes. Thin Zener and TVS.

Duane Benson
Matter + antimatter makes what?
Does it really matter?
Does anybody really know what time it is?

LEDs - Seeing Double

Dual LEDLike I do so often, I'm being a bit redundant. While I'm all for stamping out and eliminating redundancy, this is redundancy with a purpose (not a porpoise). Not long ago, in a galaxy not far away, I blogged about annoyances in surface mount diode polarity markings. You can read that here.

I'll wait.

Messy isn't it? Well, after reading that blog, someone asked me about dual diodes. For some reason, I can't seem to find the page covering dual diodes in my IPC book, but that's not the important part. What is important is the way the diodes are marked on the PC board.

We do ask for centroid data which, in theory, contains the component rotation. That would be cool except that we find that far too often, the zero degree orientation (and the rotation from that) differs from the standard. That, and there are seemingly half a dozen or so standards.

Since LEDs don't work too well backwards, we really would like to see everything marked in a non-ambiguous way in silk screen (or in an assembly drawing if you don't have silk screen). A "cathode bar" won't work because it could be a bar indicating the cathode or negative. The cathode isn't always negative, especially when looking at TVS or Zener diodes.

Mimicking the diode markation pattern printed on the part may not be secure either. Read that article I linked to right at the start of this blog. What if you put silkscreen down to match one of those LEDs but ended up buying the other one? That's exactly what I did myself. Trust me. It just leads to disappointment and possible soldering iron induced finger burns.

So what is the answer, and why am I talking about single LEDs and TVS diodes when the blog is about dual LEDs? Well, the answer is the same. The best way to communicate the desired polarity of an LED or any kind of diode is with a mini version of the schematic symbol. It doesn't matter if it's a single LED, dual LED, Schottky, Zener or what ever kind of diode. The schematic symbol is the clearest way to go.

Led marking

The diode footprint has the manufacturer's polarity marking, but I don't care. I still put the diode schematic symbol next to it. If you don't have room for silk screen, put it in an assembly drawing. You won't regret it.

Duane Benson
And they called him Flipper...

Creating a QFN Footprint - the center pad

I've written bits and pieces about creating footprints in Eagle and a lot about what the QFN solder paste layer should look like, so maybe it's time to connect the two dots. I'm using Eagle CAD here, so your process will likely be different unless you're using Eagle, but the concept should be the same. This process takes place in the package section of the Library editor. I'm assuming that you're already part way through and just need to put in the center pad.

Center pad Center pad position and sizeFirst, add the center pad to your QFN using the "Smd" tool and set the size based on the recommended pad size specified in your part datasheet.

The center of the pad should be located at 0,0 unless you have a QFN with odd shaped or multiple pads.

Make sure you un check the "Cream" box in the lower left corner as we'll be doing that manually.

After the pad is there and sized right, you need to add in the cream (solder paste) layer. You'll be drawing the cut-outs in the stencil with the rectangle tool. Use the rectangle tool to draw the stencil cut-outs. Set the rectangle to the "Cream" layer. In my installation of Eagle, the Cream layer defaults to layer 31.

Most parts should get 50 - 75% paste coverage to prevent floating (read this for more details). If your Stencil rectangle Stencil rectangle position and sizepart datasheet gives a specific number, use that. However, in my experience, most part datasheets just show a wide open stencil with 100% paste coverage. Unless you have good reason, don't do that.

Without any specific guidance, I usually aim for about 70%. In high volume manufacturing situations, the manufacturing engineers will likely spend time tweaking the coverage, but it'll be close and for a prototype, 70% is a good number.

Duane Benson