Screaming Circuits: November 2010

Electronics Shelf Life

Do parts and PCBs have a shelf life? Well, yes and no. I have some 7400 series logic chips in DIP form 7400 TH that I bought back in 1980. Every now and then, I pull one out and put it into a proto board to test some circuit idea I've got. They still work thirty years later. I haven't taken any special care in storage either. Some are stuck into anti-static foam. Some are not. All are sitting in a mini-parts bin without any moisture protection. I guess they do get a little shielding from light, but basically, they're just hanging out. They've been, at various times, in the attic, in the basement, in the garage or in the house.

That may seem like good evidence refuting a shelf like for parts. And today's parts are even more robustly Bent pins in strip designed to start with. Still though, if I use any of those parts, it's generally in a proto board or a socket. Sometimes I have to straighten the leads a bit. A lot of things don't matter so much at low temperatures, low speeds, low volumes and large geometries.

It's different when you have fine pitch parts being picked up and placed by a robot and then run through a 10 stage reflow oven. Oxidation that doesn't matter for a socketed prototype can interfere with the solder adhesion. Bent pins or missing BGA balls can prevent the part from fitting. Moisture absorbed over time can make the chip act like a pop corn kernel when in the reflow oven.

That's not to say that you can't use old parts for a prototype these days. Just give them a good inspection before sending them off for assembly. And, if they're moisture sensitive parts or have been stored in high-humidity areas, consider having your assembly house bake them before assembly. The same goes for raw PCBs too. Overly moist PCBs can delaminate during reflow. Some PCB finishes such as immersion sliver and OSP can tarnish or degrade over time too.

Duane Benson
Archaeologists, we are not

Thanksgiving Holiday Closure

Turkey_2Screaming Circuits will be closed on November 25th and 26th, 2010. This means that those days won't be counted toward your turn times. For example, if you have asked for a 48 hour turn time and we receive your kit on the afternoon (after our kit-cut-off hour) of the 24th, your 48 hour clock will start on Monday, the 29th.

We apologize for any inconvenience and wish you a happy holiday.

Duane Benson
Can anyone tell me the proper reflow profile and solder formulation for a 24 lb turkey?

PCB Planarity, Not Polarity

Via-in-pad can ruin a manufacturer's whole day. Or, if properly done, can go completely unnoticed. There are a number of ways to properly put a via in a pad but the best is to have it filled and plated oCopper filled via bulgever at the board fab house.

Copper filled via droop If you do that, check with them on their planarity standards. If they don't hold tight, you can end up with a  dip or a bump where the via is. Neither of those are as big a  problem as an open via, but they can still lead to some difficulties.

Speaking of bumps, the old standby, HASL, generally leaves bumps on the pads too. And, across the span of a BGA, the bumps can vary in size and shape. That's not such a good thing either. If you're designing with a fine-pitch BGA, you might want to consider a flatter surface such as ENIG or Immersion Silver. BGA on HASL close

Duane Benson
Fight Uni


I wrote recently about segmenting your solder paste stencils for the big open areas on your QFNs. The idea is that if the entire area is left open, it may end up with too much solder in the heat slug area, causing the part to lift up and not solder properly.

QFN center void CadstarGuy commented: "Also - when you have the full aperture in the stencil it can tend to drag as it is pasted leaving big gaps in the solder (and excess solder on the screen)." 

That's a very important point to remember. Ironically, leaving the area fully open can lead to either too much solder or not enough solder. Weird. Huh? The solution is the same: segment your stencil layer inside that center pad area.

Duane Benson
Anoid the void!

Missed it by That Much...

Yucky brd C6 Running a DRC (design rule check) before sending your PCB out for fab and assembly is a must. It's also a minimum. Not everything is caught by all DRCs.

For example, if you look at these PCB images, you'll undoubtedly spot the problem right away. These passed the Eagle DRC. I'm not saying all CAD packages will miss this kind of thing, but you should always expect that something might get through. Yucky brd I2C

Of course, if you end up selecting the wrong component footprint, or if the footprint library part was created incorrectly, the DRC definitely won't catch it. A DRC also won't likely help if you output your Gerbers incorrectly, i.e., positive output vs. negative output.

Just like you don't completely trust an autorouter, you shouldn't completely trust your CAD packages ERC and DRCs. Spend a little time manually double checking things too.

Duane Benson
Bring out the cone of silence

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